EDN

1-Transistor SRAM Cell Scales to FinFET Technology Node

Zeno’s one-transistor Bi-SRAM uses a single transistor and is ~5× smaller than a conventional SRAM — which uses six-transistor bitcells (6T-SRAM) — at the same technology node One way to look at a ...
EDN

MoSys adds soft-error protection, correction to 1-transistor SRAM for ‘free’

SUNNYVALE, Calif — How about error correction in embedded SRAM memory for free? That's essentially what MoSys Inc. today announced with the launch of an enhanced ...
Design-Reuse

Low Power 7T SRAM Cell Scheme - ''Saving Write Zero Power''

This paper presents a Seven-transistor SRAM cell intended for the advanced microprocessor. A low power write scheme, which reduces SRAM power by using seven-transistor sense-amplifying memory cell, ...
Electronic Design

Overcome Traditional Memory-Speed Barriers With Embedded DRAM

Engineers can now turbocharge their designs without having to sacrifice DRAM's high bit density to run at near-SRAM speeds. For applications where performance is of primary importance, designers have ...